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hexfet power mosfet benefits improved gate, avalanche and dynamic dv/dt ruggedness fully characterized capacitance and avalanche soa enhanced body diode dv/dt and di/dt capability lead-free rohs compliant, halogen-free applications high efficiency synchronous rectification in smps uninterruptible power supply high speed power switching hard switched and high frequency circuits s d g gds gate drain source to-220ab s d g d v dss 60v r ds(on) typ. 2.1m max. 2.5m i d (silicon limited) 270a i d (package limited) 195a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw avalanche characteristics e as (thermally limited) single pulse avalanche energy mj i ar avalanche current a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r jc junction-to-case ??? 0.4 r cs case-to-sink, flat greased surface 0.50 ??? c/w r ja junction-to-ambient ??? 62 -55 to + 175 20 2.5 10lb in (1.1n m) max. 270 190 1080 195 a c 300 320 see fig. 14, 15, 22a, 22b, 375 10

form quantity IRFB3006PBF to-220 tube 50 IRFB3006PBF base part number package type standard pack orderable part number

calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 195a. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.
repetitive rating; pulse width limited by max. junction temperature. limited by t jmax , starting t j = 25c, l = 0.022mh r g = 25 , i as = 170a, v gs =10v. part not recommended for use above this value . s d g i sd 170a, di/dt 1360a/ s, v dd v (br)dss , t j 175c. pulse width 400 s; duty cycle 2%. c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). for recommended footprint and soldering techniques refer to application note #an-994.
static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 60 ??? ??? v ( / . 0.0 / ( .1 . v gs(th) gate threshold voltage 2.0 ??? 4.0 v i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 r g internal gate resistance ??? 2.0 ??? dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 280 ??? ??? s q g total gate charge ??? 200 300 nc q gs gate-to-source charge ??? 37 ??? q gd gate-to-drain ("miller") charge ??? 60 q sync total gate charge sync. (q g - q gd ) ??? 140 ??? t d(on) turn-on delay time ??? 16 ??? ns t r rise time ??? 182 ??? t d(off) turn-off delay time ??? 118 ??? t f fall time ??? 189 ??? c iss input capacitance ??? 8970 ??? pf c oss output capacitance ??? 1020 ??? c rss reverse transfer capacitance ??? 534 ??? c oss eff. (er) effective output capacitance (energy related) ??? 1480 ??? c oss eff. (tr) effective output capacitance (time related) ??? 1920 ??? diode characteristics symbol parameter min. typ. max. units i s continuous source current ??? ??? 270 a (body diode) i sm pulsed source current ??? ??? 1080 a (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 44 ??? ns t j = 25c v r = 51v, ??? 48 ??? t j = 125c i f = 170a q rr reverse recovery charge ??? 63 ??? nc t j = 25c di/dt = 100a/ s ??? 77 ??? t j = 125c i rrm reverse recovery current ??? 2.4 ??? a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) conditions v ds = 25v, i d = 170a i d = 170a v gs = 20v v gs = -20v mosfet symbol showing the v ds =30v conditions v gs = 10v v gs = 0v v ds = 50v ? = 1.0 mhz, see fig. 5 v gs = 0v, v ds = 0v to 48v , see fig. 11 v gs = 0v, v ds = 0v to 48v t j = 25c, i s = 170a, v gs = 0v integral reverse p-n junction diode. conditions v gs = 0v, i d = 250 a reference to 25c, i d = 5ma v gs = 10v, i d = 170a v ds = v gs , i d = 250 a v ds = 60v, v gs = 0v v ds = 60v, v gs = 0v, t j = 125c i d = 170a r g = 2.7 v gs = 10v v dd = 39v i d = 170a, v ds =0v, v gs = 10v

fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 25c 3.5v vgs top 15v 10v 8.0v 6.0v 5.0v 4.5v 4.0v bottom 3.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 175c 3.5v vgs top 15v 10v 8.0v 6.0v 5.0v 4.5v 4.0v bottom 3.5v 2.0 3.0 4.0 5.0 6.0 7.0 v gs , gate-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 25v 60 s pulse width t j = 25c t j = 175c 1 10 100 v ds , drain-to-source voltage (v) 0 4000 8000 12000 16000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 40 80 120 160 200 240 280 q g total gate charge (nc) 0 4 8 12 16 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 48v v ds = 30v i d = 170a -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 170a v gs = 10v

fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.0 0.4 0.8 1.2 1.6 2.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 25 50 75 100 125 150 175 t c , case temperature (c) 0 50 100 150 200 250 300 i d , d r a i n c u r r e n t ( a ) limited by package -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 55 60 65 70 75 80 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e i d = 5ma 0 10 20 30 40 50 60 v ds, drain-to-source voltage (v) 0.0 0.5 1.0 1.5 2.0 e n e r g y ( j ) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 1400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 20a 27a bottom 170a 0.1 1 10 100 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc limited by package

fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) ? (sec) 0.175365 0.000343 0.22547 0.006073 j j 1 1 2 2 r 1 r 1 r 2 r 2 c c ci= i / ri 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 170a
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fig 23a. switching time test circuit fig 23b. switching time waveforms fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 21. +

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p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period , !" # $%#&'&% , + - + + + - - - ? ! ? "#$## ? % && ? #$##'$

d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - v ds 90% 10% v gs t d(on) t r t d(off) t f ( ) 1 * % 0.1 % '( + -
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to-220ab packages are not recommended for surface mount application.

irfb3006 irfb3006 pyww? lc lc part number date code p = lead-free y = last digit of year ww = work week ? = assembly site code international rectifier logo assembly lot code or ywwp lc lc part number date code y = last digit of year ww = work week p = lead-free international rectifier logo assembly lot code
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ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/ / 0

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qualification level moisture sensitivity level to-220 not applicable rohs compliant (per jedec jesd47f ?? guidelines) yes qualification information ? industrial revision history date comment ? updated data sheet with new ir corporate template. ? . ? added bullet point in the benefits "rohs compliant, halogen -free" on page 1. 4/23/2014

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